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pin connections mc33690 order this document by mc33690/d semiconductor technical motorola rev 4.8 ? motorola, inc., 2002. this document contains information on a new product under development. motorola reserves the right to change or discontinue this product without notice. standalone tag reader circuit starc the standalone tag reader circuit (starc) is an integrated circuit dedicated to the automotive immobilizer applications. it combines on the same chip all the circuitry to interface with a transponder : antenna drivers and demodulator. a low dropout voltage regulator and a physical interface fully compatible with the iso 9141 norm are also available. the standalone tag reader circuit is fabricated with the smartmos tm 3.5 technology. this process is a double layer metal, 1.4m, 45v technology, combining cmos and bipolar devices. ? contactless 125khz tag reader module : - self synchronous sample & hold demodulator - amplitude or phase modulation detection - high sensitivity - fast ?read after write? demodulator settling time - low resistance and high current antenna drivers : 2 ? @ 150ma (typ.) - bidirectionnal data transmission - multi tag, multi scheme operation. low dropout voltage regulator : - wide input supply voltage range : from 5.5v up to 40v - output current capability up to 150ma dc with an external power transistor - 5v output voltage with a 5% accuracy - low voltage reset function - low current consumption in standby mode : 300a (typ.). iso 9141 transmitter and receiver module : - input voltage thresholds ratiometric to the supply voltage - current limitation - ouput slew rate control - no external protection device required. standalone tag reader circuit source td1 vdd td2 xtal2 xtal1 am k rx tx 1 2 3 7 4 5 6 8 13 12 11 10 9 14 vss vsup gate 15 16 17 20 19 18 mode1 mode2 rd lvr dout agnd cext ordering information device operating junction temperature range package MC33690DW t j = -40 c to 125 c soic 20 dw suffix plastic package case 751d so - 20 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mc33690 motorola semiconductors products 2 revision 4.8, 5 february 2002 ? motorola, inc., 2002. block diagram figure 1 : standalone tag reader circuit vdd vbat vsup gate source vdd vss td1 td2 rd xtal1 xtal2 mode1 mode2 dout lvr voltage regulator am cext agnd tag reader tx rx iso 9141 interface vbat r a c a l a r 1 r 2 c ext k 10 f 10nf 8mhz 510 ? c 1 optional : external n channel mos required for sourced current > 50ma. a recommended reference is mmft 3055vl from motorola. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mc33690 motorola semiconductors products 3 revision 4.8, 5 february 2002 ? motorola, inc., 2002. maximum ratings note 1 : human body model, aec-q100-002 rev. c. machine model, aec-q100-003 rev. e. thermal characteristic rating symbol value unit supply voltage v sup v ss -0.3 to +40 v supply voltage without using the voltage regulator (v sup = v dd ) v dd v ss -0.3 to +7 v voltage on source v ss -0.3 to +40 v current into/from gate 0 ma voltage on gate v ss -0.3 v voltage on pins : mode1/2, cext, dout, lvr, xtal1/2, rx, tx v ss -0.3 to v dd +0.3 v voltage on rd 10 v voltage on k and am v ss -3 to 40 v current on td1 & td2 (drivers on & off) 300 ma voltage on agnd v ss 0.3 v esd voltage capability (hbm, see note 1) 2000 v esd voltage capability (mm, see note 1) 200 v solder heat resistance test (10s) 260 c junction temperature t j 170 c storage temperature t s -65 to +150 c characteristic symbol value unit junction to ambiant thermal resistance (soic20) r th 80 c/w f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
motorola semiconductors products 4 revision 4.8, 5 february 2002 ? motorola, inc., 2002. mc33690 pin function description pin function description 1 vsup power supply 2 source external n channel transistor source 3 gate external n channel transistor gate 4 td1 antenna driver 1 output 5 vss power and digital ground 6 vdd voltage regulator output 7 td2 antenna driver 2 output 8 mode1 mode selection input 1 9 mode2 mode selection input 2 10 rd demodulator input 11 agnd demodulator ground 12 cext comparator reference input 13 dout demodulator output (5v) 14 lvr low voltage reset input/output 15 xtal2 oscillator output 16 xtal1 oscillator input 17 am amplitude modulation input 18 k iso 9141 transmitter output and receiver input 19 rx iso 9141 receiver monitor output 20 tx iso 9141 transmitter input f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
motorola semiconductors products 5 revision 4.8, 5 february 2002 ? motorola, inc., 2002. mc33690 description tag reader module the tag reader module is dedicated for automotive or industrial applications where information has to be transmitted contactless. the tag reader module is a write/read (challenge/ response) controller for applications which demand high security level. the tag reader module is connected to a serial tuned lc circuit which generates a magnetic field power supplying the tag. the use of a synchronous sample & hold technique allows communication with all avalaible tags using admittance switching producing absorption of the rf field. load amplitude or phase shift modulation can be detected at high bit rates up to 8khz. 125khz is the typical operational carrier frequency of the tag reader module with a 8mhz clock. figure 2 : tag reader block diagram d c q + - 1/32 counter 1/2 rd cext agnd buffer vdd 500ns s/h buffer comparator 100k ? 8mhz clock 8mhz data out interface 125khz td2 11.25 , 22.5 , 33.75 , 45 , 56.25 , 67.5 , 78.75 , 90 am data + - 4mhz 125khz lvr shutdown td1 10nf + 0, -11.25, -22.5, -33.75, -45, -56.25, -67.5, -78.75 c a l a r 1 r 2 c ext r a vdd + - setup & preload self synchronous sample & hold 500 a f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
motorola semiconductors products 6 revision 4.8, 5 february 2002 ? motorola, inc., 2002. mc33690 read function when answering to the base station, a transponder generates an absorption modulation of the magnetic field. it results in an amplitude/ phase modulation of the current across the antenna. this information is picked up at the antenna tap point between the coil and the capacitor. an external resistive ladder down scales this voltage to a level compatible with the demodulator input voltage range (see parameter v inrd page 16). the demodulator (see figure 2) consists of : - an input stage (emitter follower), - a sample & hold circuit, - a voltage follower, - a low offset voltage comparator. the sampling time is automatically set to take into account a phase shift due to the tolerances of the antenna components (l and c) and of the oscillator. the allowed phase shift measured at the input rd ranges from -45 to +45 . assuming that the phase reference is the falling edge of the driving signal td1, this leads to a sampling time phase ranging from -78.75 to 90 with discrete steps of 11.25 . after reset condition, the sampling time phase is +11.25 . the antenna phase shift evaluation is only done : - after each wake-up command (see pages 10 to 12), - or after reset (see page 7). this is necessary to obtain the best demodulator performances. in order to ensure a fast demodulator settling time after wake up, reset or a write sequence, the external capacitor c ext is preloaded at its working voltage. this preset occurs 256s after switching the antenna drivers on and its duration is 128s. after wake up or reset, the preset has the same duration but begins 518s after clock settling. after power on reset, vsup must meet the minimum specified value, enabling the nominal operation of vdd, before the start of the preset. otherwise the preset must be done by the user through a standby/wake-up sequence. write function whatever the selected configuration (see page 9), the write function is achieved by switching on/off the output drivers td1/2. once the drivers have been set in high impedance, the load current flows alternatively figure 3 : current flow when the buffers are switched off c a l a r 1 r a td1 vdd td2 vdd i load f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
motorola semiconductors products 7 revision 4.8, 5 february 2002 ? motorola, inc., 2002. mc33690 voltage regulator the low dropout voltage regulator provides a regulated 5v supply for the internal circuitry. it can also supply external peripherals or sensors. the input supply voltage ranges from 5.5v to over 40v. this voltage regulator uses a series combination of high voltage ldmos and low voltage pmos transistors to provide regulation. an external low esr capacitor is required for the regulator stability. the maximum average current is limited by the power dissipation capability of the so 20 package. this limitation can be overcome by connecting an external n channel mos in parallel with the internal ldmos. the threshold voltage of this transistor must be lower than the one of the internal ldmos (1.95v typ.) in order to prevent the current from flowing into the ldmos. its breakdown voltage must be higher than the maximum supply voltage. a low voltage reset function monitors the vdd output. an internal 10a pull-up current source allows, when an external capacitor is connected between lvr and gnd, to generate delays at power up (5ms typ. with c reset =22nf) . the lvr pin is also the input generating the internal reset signal. applying a logic low level on this pin resets the circuit : - all the internal flip flops are reset, - the drivers td1/2 are switched on. figure 4 : voltage regulator block diagram 1mhz oscillator charge pump voltage reference and biasing generator + - vsup gate source vdd comparator n channel ldmos p channel mos + - lvr vbat c 1 vdd 10 f 10 0n f c 3 c 2 10 a vdd c reset vdd reset f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
motorola semiconductors products 8 revision 4.8, 5 february 2002 ? motorola, inc., 2002. mc33690 iso 9141 physical interface this interface module is fully compatible with the iso 9141 norm describing the diagnosis line. it includes one transmitter (pin k) and 2 receivers (pins k and am). the input stages consist of high voltage cmos triggers. the thresholds are ratiometric to vsup. a ground referenced current source (2.5a typ.) pulls down the input when unconnected. when a negative voltage is applied on the k or am lines, the input current is internally limited by a 2k ? resistor (typ.) in series with a diode. a current limitation allows the transmitter to drive any capacitive load and protects against short circuit to the battery voltage. an overtemperature protection shuts the driver down when the junction temperature exceeds 150 c (typ). once shut down by the overtemperature protection, the driver can be switched on again : - if the junction temperature has decreased below the threshold, - and by applying an off/on command, coming either from the demodulator in configurations a and b or directly applied on the input tx in configuration c (see pin k status in table 1 page 9). the electromagnetic emission is reduced thanks to the voltage slew rate control (5v/s typ.). figure 5 : iso 9141interface command rx k tx k line vbat 2k ? over temperature current limitation detector vdd vdd tag reader module output am vsup from configuration controller am data from configuration controller l line vsup vdd gnd 2.5 a gnd 2.5 a 2k ? gnd gnd f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
motorola semiconductors products 9 revision 4.8, 5 february 2002 ? motorola, inc., 2002. mc33690 communication modes description the starc offers 3 different communication modes. therefore it can be used as a standalone circuit connected to an electronic control unit (ecu) through a bus line or it can be directly connected to a microcontroller in case of a single board architecture. table 1. communication modes description configuration configuration pins pin status & function description type bus type name mode1 mode2 standalone 1 wire (vbat) a00 k output/input : - demodulator output, - amplitude modulation input - shutdown/wake-up am must be connected to vsup dout forces a low level 2 wires (vbat) b01 k output : - demodulator output am input : - amplitude modulation input, - shutdown/wake-up dout forces a low level direct connection to a mcu 2 wires (vdd) c1 x dout output : - demodulator output am input : - amplitude modulation input mode2 input : - shutdown/wake-up 1 k output/input (standalone iso 9141 inter- face) : - driven by tx and monitored by rx 0 k input (standalone iso 9141 interface) : - monitored by rx - tx disabled f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
motorola semiconductors products 10 revision 4.8, 5 february 2002 ? motorola, inc., 2002. mc33690 standalone configuration with one wire bus when a low level is applied on pins mode1 and mode2, the circuit is in configuration a (standalone single wire bus configuration, see figure 13 page 18). after power on, the circuit is set into read mode . the demodulator output is directly routed to the iso 9141 interface output k. the circuit can be set into write mode at anytime by violation of all possible patterns on the single wire bus during more than 1ms. then the k line achieves the amplitude modulation by switching on/off both antenna drivers. after 1ms of inactivity at the end of the challenge phase (bus in idle recessive one state), the circuit is set back into read mode. the circuit can be put into standby mode by forcing the k line at zero during more than 2 ms after entering the write mode. once the k line is released, the circuit sends an acknowledge pulse before entering into standby mode. in standby mode, the oscillator and most of the internal biasing currents are switched off. therefore, the functions (tag reader, iso 9141 driver) are inactive except the voltage regulator and the iso 9141 receiver on pin k. the driver output td1 forces a low level and td2 a high level. a rising edge on k wakes up the circuit. after completion of the wake-up sequence, the circuit is automatically set in read mode. in configuration a, dout and rx outputs always force a low level, tx is disabled. figure 6 : mode access description in one wire bus configuration figure 7 : configuration a state diagram k line t 0 t < t 0 ? +t 1 ? 1 0 0 0 1 1 read mode write mode k line t t 0 read mode write mode k line t t 1 standby mode write mode read to write mode : write to read mode : write to standby mode : standby mode to read mode : standby mode read mode wake-up sequence k line acknowledge t 2 t 2 read write td1/2 write td1/2 off standby t 0 k line low k line high < t 0 ? t 1 k line low t 0 k line high wake up k line low reset k switching f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
motorola semiconductors products 11 revision 4.8, 5 february 2002 ? motorola, inc., 2002. mc33690 timing definitions for a 8mhz crystal: - t ref is crystal oscillator period (125 ns typ.) - t 0 =8064.t ref = 1.008ms typ. - t 0 ? =7932.t ref = 0.992ms typ. - t 1 =16256.t ref = 2.032ms typ. - t 1 ? =16128.t ref = 2.016ms typ. - t 2 =4096.t ref , = 512s typ. t 0 is the minimum time required to guarantee that the device toggles from read to write (or from write to read). but indeed, the starc may toggle from read to write (or from write to read) between t 0 and t 0 ? . t 1 is the minimum time required to guarantee that the device toggles from write to standby. but indeed, the starc may toggle in standby between t 1 and t 1 ? . f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
motorola semiconductors products 12 revision 4.8, 5 february 2002 ? motorola, inc., 2002. mc33690 standalone configuration with two wires bus when a low level is applied on mode1 and a high level on mode2, the circuit is in configuration b (standalone 2 wires bus configuration, see figure 14 page 19). the k pin is set as an output sending the demodulated data. the am pin is set as a vsup referenced input pin receiving the amplitude modulation and the shutdown/wake-up commands. forcing high and low levels on am achieves the amplitude modulation by switching on/off both antenna drivers. meanwhile, this amplitude modulation can be monitored on the k output. this allows antenna short and open circuit diagnosis. the circuit can be put into standby mode by forcing the am line at zero during more than 2 ms. the circuit sends an acknowledge pulse before entering into standby mode in standby mode, the oscillator and most of the internal biasing currents are switched off. therefore, the functions (tag reader, iso 9141 driver) are inactive except the voltage regulator and the iso 9141 receiver on pin am. the driver output td1 forces a low level and td2 a high level. a rising edge on am wakes up the circuit. after completion of the wake-up sequence, the circuit is automatically set in read mode. in configuration b, dout and rx outputs always force a low level, tx is disabled. figure 8 : modes access description in two wires bus configuration figure 9 : configuration b state diagram am line 1 0 0 0 1 1 data read drivers off am line t t1 standby mode read & write sequences : 1 0 0 0 1 1 k line entering into st andby mode : k line data write modulation data write am line monitoring drivers on wake-up sequence data read t2 t2 t1 coming out of st andby mode : am line k line standby mode acknowledge td1/2 off td1/2 standby am line high wake up am line low t1 am line low reset am line high am line low am switching f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
motorola semiconductors products 13 revision 4.8, 5 february 2002 ? motorola, inc., 2002. mc33690 direct connection to a microcontroller configuration when a high level is applied on mode1, the circuit is in configuration c (direct connection to a microcontroller configuration, see figure 15 page 19). the demodulated data are sent through dout. the am pin is set as a vdd referenced input pin receiving the am command. forcing high and low levels on am achieves the amplitude modulation by switching on/off both antenna drivers. meanwhile, this amplitude modulation can be monitored on dout. this allows antenna short and open circuit diagnosis. the circuit can be put into standby mode by applying a low level on the mode2 pin. in standby mode, the oscillator and most of the internal biasing currents are switched off. therefore, the functions (tag reader, iso 9141 interface) are inactive except the voltage regulator. the driver outputs td1 and td2 are frozen in their state (high or low level) before entering into standby mode. dout forces a low level. the iso 9141 interface k is standalone and can be directly controlled by the input pin tx and monitored by the output rx. applying a logic high level on tx switches the output driver k on (dominant zero state when an external pull-up resistor is connected between k and vbat). applying a logic low level turns the driver off (one recessive state). rx monitors the voltage at the k pin. when the voltage is below the low threshold voltage, rx forces a logic low level. when the voltage is above the high threshold voltage, rx forces a logic high level. in standby mode, tx is disabled and rx output monitors the voltage at the k pin. figure 10 : configuration c state diagram td1/2 off standby wake up mode2 low mode2 high mode2 low td1/2 am high am high am low reset am low switching f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mc33690 motorola semiconductors products 14 revision 4.8, 5 february 2002 ? motorola, inc., 2002. electrical characteristics typical values reflect average measurements at v sup =12v and t j =25 c. supply current 6v v sup 16v, v ss = 0v, t j = ? 40 c to +125 c, unless otherwise noted voltage regulator 6v v sup 16v, v ss = 0v, t j = ? 40 c to +125 c, unless otherwise noted parameter symbol test conditions & comments min typ max unit type pin vsup 9.1 standby mode current i sup1 - 300 500 a 9.2 operating mode current i sup2 see note 1 1. circuit in configuration c, no current sunk from vdd, drivers td1/2 switched off, tx forced to low. -1.52.5ma parameter symbol test conditions & comments min typ max unit type pins vsup & vdd 1.1 output voltage (5.5v v sup 40v) v vdd1 without external mos transistor i out 50ma 4.75 5.0 5.25 v 1.3 total output current i vdd1 --50ma 1.5 load regulation v loadreg1 without external mos transistor 1 to 50ma i out change -2060mv 1.9 output voltage (5.5v v sup 40v) v vdd2 with external mos transistor, see notes 1 and 2 i out 150ma 1. the stability is ensured with a decoupling capacitor between vdd and vss : c out 10 f with esr 3 ? . 2. the current capability can be increased up to 150ma by using an external n channel mos transistor (see figure 1 page 2). th e main characteristics for choosing this component are : vt < 1.8v and bvdss > 40v. 4.7 5.0 5.3 v 1.11 total output current i vdd2 --150ma 1.6 load regulation v loadreg2 with external mos transistor 1 to 150ma i out change -65150mv 1.4 line regulation (6v v sup 16v) v linereg i out = 1ma -15 -1 - mv f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mc33690 motorola semiconductors products 15 revision 4.8, 5 february 2002 ? motorola, inc., 2002. low voltage reset 6v v sup 16v, v ss = 0v, t j = ? 40 c to +125 c, unless otherwise noted figure 11 : low voltage reset waveform oscillator 6v v sup 16v, v ss = 0v, t j = ? 40 c to +125 c, unless otherwise noted parameter symbol test conditions & comments min typ max unit type pin lvr 1.6 low voltage reset low threshold v lvron see note 1 and figure 11 1. as the voltage regulator and the low voltage reset are using the same internal voltage reference, it is ensured that the low voltage reset will only occur when the voltage regulator is out of regulation. 4.14.354.6 v 1.7 low voltage reset hysteresis v lvrh 50 100 150 mv 1.12 pull-up current i lvrup v lvr = 2.5v 51015 a 1.13 output resistance in reset condition r lvr v lvr = 2.5v 200 370 500 ? 1.14 input low voltage v illvr 0- 0.3 x v dd v 1.15 input high voltage v ihlvr 0.7 x v dd -v dd v characteristic symbol test condition & comments min typ max unit type pins xtal1, xtal2 8.0 input capacitance c xtal1 v xtal1 = 2.5v - 5 - pf 8.1 voltage gain v xtal2 / v xtal1 a osc v xtal1 = 2.5v - 25 - - 8.3 clock input level v xtal1 see note 1 1. this level ensures the circuit operation with a 8mhz clock. it is applied through a capacitive coupling. a 1m ? resistor connected between xtal1 and xtal2 biases the oscillator input. 1.5 - v dd vpp vdd lvr v lvron v lvron + v lvrh f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mc33690 motorola semiconductors products 16 revision 4.8, 5 february 2002 ? motorola, inc., 2002. tag reader 6v v sup 16v, v ss = 0v, t j = ? 40 c to +125 c, unless otherwise noted figure 12 : demodulator parameters definition parameter symbol test conditions & comments min typ max unit type demodulator (pin rd) 2.0 input voltage range v inrd 345v 2.2 input modulation frequency f mod 0.5 4 8 khz 2.3 demodulator sensitivity v sense1 6.5v v sup 16v see figure 12 and note 1 1. the sensitivity is measured in the following application conditions : i antenna = 50ma peak, v rd = 4v peak, c ext = 10nf, square wave modulation f mod =f td1 /32. -515mv 2.31 demodulator sensitivity v sense2 6v v sup < 6.5v see figure 12 and note 1 - 7 30 mv 2.4 demodulation delay t demod see figure 12 configuration c see note 2 for configurations a and b 2. not including the delay due to the slew rate of the k output. -7.510 s 2.5 after write pulse settling time t settling1 - 394 400 s 2.6 recovery time after wake-up or reset from clock stable to demodulator valid output t settling2 see note 3 3. clock stable condition implies v xtal1 meets the specification (see page 15). - 646 700 s drivers (pins td1, td2) 3.5 output carrier frequency to crystal frequency ratio r ftd/ fxtal -64-- 3.0 turn on/off delay t on/off - - 250 ns 3.1 driver1/2 low side out. resistance r tdl i load = 150ma dc - 2.4 4 ? 3.2 driver1/2 high side out. resistance r tdh i load = -150ma dc - 2.1 4 ? demodulator v rd v sense t demod output (k or dout) f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mc33690 motorola semiconductors products 17 revision 4.8, 5 february 2002 ? motorola, inc., 2002. iso 9141 interface 6v v sup 16v, v ss = 0v, t j = ? 40 c to +125 c, unless otherwise noted digital i/o 6v v sup 16v, v ss = 0v, t j = ? 40 c to +125 c, unless otherwise noted parameter symbol test conditions & comments min typ max unit type receiver (pins k & am) 4.0 input low voltage v il -3 - 0.3 x v sup v 4.1 input high voltage v ih 0.65 x v sup -40v 4.2 input hysteresis voltage v hy1 0.40.651.3 v 4.3 biasing current i b 0v v in 16v 1 3 5 a 4.31 input current i bm -3 v in < 0-2-1-ma 4.4 k to rx delay tdkrx 2 10 s driver (pin k) 5.0 output falling edge slew rate sr f r pull-up = 510 ?, see note 1 1. calculated from 20% to 80% of the output swing. 3.5 5 6.5 v/ s 5.1 output rising edge slew rate sr r 3.5 5 6.5 v/ s 5.2 rise fall slew rates symmetry sr syme- try -1 0 1 v/ s 5.3 output low voltage v olk i load = 25ma - 1.1 1.4 v 5.4 input current (driver switched on or off) i ik -3v v in 0v -2 - 0 ma 5.5 current limitation threshold i l 0v v in 40v 35 50 65 ma 5.6 thermal shutdown threshold th sdwn 130 150 170 c characteristic symbol test condition & comments min typ max unit type input (pins mode1, mode2, am, tx) 6.0 input low voltage v ild 0- 0.3 x v dd v 6.1 input high voltage v ihd 0.7 x v dd -v dd v 6.2 input hysteresis voltage v hd .24 .7 1 v output (pins dout,rx) 7.0 output low voltage v ol i load = 500ua 0 0.5 0.2 x v dd v 7.1 output high voltage v oh i load = -500ua 0.8 x v dd 4.6 v dd v 7.2 fall/rise time t f/r c load =10pf, see note 1 1. calculated from 10% to 90% of the output swing. - - 150 ns f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mc33690 motorola semiconductors products 18 revision 4.8, 5 february 2002 ? motorola, inc., 2002. application schemes figure 13 : standalone configuration with one wire bus vbat vsup gate source td1 td2 rd xtal1 xtal2 mode1 mode2 dout lvr am cext agnd starc tx rx c ext 10 f 10nf 8mhz vdd vss 10 0n f nc nc vsup nc 510 ? vbat k vss c 1 c 3 c 2 r a c a l a r 1 r 2 if no external mos transistor is necessary to increase the voltage regulator current capability, the pins gate and source must be left unconnected. in this configuration, the outputs rx and dout force a low level. c 1 is not required for the starc functionality and only acts as a reservoir of energy. to preserve the demodulator sensitivity, c ext and r 2 should be connected to agnd, and vss connected to agnd using a low resistance path. nc nc 1m ? 8.2pf 8.2pf f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mc33690 motorola semiconductors products 19 revision 4.8, 5 february 2002 ? motorola, inc., 2002. figure 14 : standalone configuration with two wires bus vbat vsup gate source td1 td2 rd xtal1 xtal2 mode1 mode2 dout lvr am cext agnd starc tx rx r a c a l a r 1 r 2 c ext 10 f 10nf vdd vss 10 0n f nc nc nc 510 ? vdd k vss c 1 c 3 c 2 vbat nc nc if no external mos transistor is necessary to increase the voltage regulator current capability, the pins gate and source must be left unconnected. c 1 is not required for the starc functionality and only acts as a reservoir of energy. to preserve the demodulator sensitivity, c ext and r 2 should be connected to agnd, and vss connected to agnd using a low resistance path. 8mhz 1m ? 8.2pf 8.2pf f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mc33690 motorola semiconductors products 20 revision 4.8, 5 february 2002 ? motorola, inc., 2002. figure 15 : direct connection to a microcontroller vbat vsup gate source td1 td2 rd xtal1 xtal2 mode1 mode2 dout lvr am cext agnd starc tx rx c ext 10 u f 10nf vdd vss 10 0n f nc nc 510 ? vbat k vss c 1 c 3 c 2 vdd to microcontroller port to microcontroller port to microcontroller to microcontroller power supply pin r a c a l a r 1 r 2 if no external mos transistor is necessary to increase the voltage regulator current capability, the pins gate and source must be left unconnected. c 1 is not required for the starc functionality and only acts as a reservoir of energy. to preserve the demodulator sensitivity, c ext and r 2 should be connected to agnd, and vss connected to agnd using a low resistance path. 8mhz 1m ? 8.2pf 8.2pf port/reset pin f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mc33690 motorola semiconductors products 21 revision 4.8, 5 february 2002 ? motorola, inc., 2002. notes f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mc33690 motorola semiconductors products 22 revision 4.8, 5 february 2002 ? motorola, inc., 2002. notes f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mc33690 motorola semiconductors products 23 revision 4.8, 5 february 2002 ? motorola, inc., 2002. notes f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mc33690 motorola reserves the right to make changes without further notice to any products herein. motorola makes no warranty, represen tation or guarantee regarding the suitability of its products for any particular purpose, nor does motorola assume any liability arising out of the applicati on or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. ? typical ? parameters which may be provided in motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all oper ating parameters, including ? typicals ? must be validated for each customer application by customer ? s technical experts. motorola does not convey any license under its patent rights nor the rights of others. motorola products are not designed, intended, or authorized for use as components in systems intended for sur gical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the motorola produ ct could create a situation where personal injury or death may occur. should buyer purchase or use motorola products for any such unintended or unauthorized application, buyer shall indemnify and hold motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, a nd expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that motorola was negligent regarding the design or manufacture of the part. motorola and the stylized m logo are registered in the u.s. patent and trademark office. motorola, inc. is an equal opportunity/affirmative action employer. all other product or service names are the property of thei r respective owners. ? motorola, inc. 2002 how to reach us: usa/europe/locations not listed: motorola literature distribution: p.o. box 5405, denver, colorado 80217. 1-303-675-2140 or 1-800-441-2447 japan: motorola japan ltd.; sps, technical information center, 3-20-1 minami-azabu. minato-ku, tokyo 106-8573 japan. 81-3-3440-3569 asia/pacific: motorola semiconductors h.k. ltd.; silicon harbour centre, 2 dai king street, tai po industrial estate, tao po, n.t., hong kong. 852-26668334 technical information center: 1-800-521-6274 home page: http://motorola.com/semiconductors/ mc33690/d f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .

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